1. Field of the Invention
The present invention relates to the fabrication of silicon devices and more particularly to the growing of epitaxial layers of silicon by deposition at low temperatures and low or atmospheric pressure.
2. Prior Art
Low temperature silicon epitaxial growth processes allow fabrication of novel and small silicon (Si) devices with structures important for high performance semiconductor applications, such as elevated source-drains for CMOS devices, and are key to producing some ultra-fast devices such as the heterojunction bipolar transistors (HBTs) in Si recently reported by G. L. PATTON, S. S. IYER, S. L. DELAGE, S. TIWARI, and J. M. C. STORK, in IEEE EDL, 9, 195 (1990). Important requirements for any potential epitaxial manufacturing process are adequate measures for defect avoidance and control, and broad utility, such as the capability of producing Si layers with necessary additives, such as n- and p-type dopants and Ge. Also important is the capability of controlling the relative thicknesses of polycrystalline and single crystal layers when deposition takes place simultaneously on insulator and bare single crystal layers on a patterned substrate.
Two known low temperature epitaxial processes for Si are disclosed by B. S. MEYERSON in Appl. Phys. Lett., 48, 797 (1986), and T. O. SEDGWICK, M. BERKINBLIT, and T. S. KUAN in Appl. Phys. Lett., 54, 2689 (1989), the former using ultra-high vacuum, chemical-vapor deposition (UHV/CVD) with silane as a reactant, and the latter employing ultra-clean, atmospheric pressure, chemical-vapor deposition (APCVD) using dichlorosilane (DCS) as a reactant. (Here "ultra-clean" means that water vapor, oxygen and other oxidants have been carefully and systematically excluded from the reaction chamber and the gas handling system.) Other systems of this nature are generally disclosed in U.S. Pat. No. 4,592,792 to CORBOY, JR. ET AL and U.S. Pat. No. 4,786,615 to LIAW ET AL. While each of these systems have specific fabrication advantages, they also have definite limitations.
Problem
A common requirement for both of these low temperature epitaxial processes is a preclean step before epitaxial growth is begun in order to have the surface of the semiconductor substrate, typically a Si wafer surface, free of foreign material and oxide. In practice one or more preclean procedures are used with the goal of removing the foreign materials or at least rendering such materials relatively harmless to the subsequent fabrication process and the devices produced thereby. The best accepted standard preclean has been a H.sub.2 prebake for several minutes at 950.degree.-1190.degree. C., with the lower temperatures being used for patterned wafers and the higher for non-patterned wafers. At the highest temperatures, SiO.sub.2 reacts with Si to form the volatile oxide SiO, while at lower temperatures the H.sub.2 is known to preferentially attack the bonding of the SiO.sub.2 to the Si surface and hence undercut and presumably remove it. (See S. T. LIU, L. CHAU, and J. O. BORLAND, Proceedings of the Conference on Chemical Vapor Deposition, CVD-X, Ed. G. W. CULLEN, 87-8, The Electrochemical Society, Pennington, N.J., 1987, p. 428-434.) Also, lower temperature precleans in H.sub.2 at temperatures down to 800.degree. C., although still useful for removing oxide, are slower and not as effective and may leave some oxide or expose the wafer to reoxidation from inadvertent residual oxygen, water vapor or other oxidants in the gas phase. Because of the nature of the currently used UHV/CVD equipment, i.e., large constant temperature furnace and exclusive low pressure operation, a H.sub.2 prebake is only possible at a deposition temperature of about 500.degree.-600.degree. C. and is therefore totally ineffective. The APCVD process on the other hand easily incorporates a H.sub.2 preclean because of the temperature flexibility, i.e., 500.degree.-1200.degree. C., and the capability of flowing H.sub.2 at one atmosphere pressure.
In carrying out the preclean step, when employing the UHV/CVD process, a liquid HF dip is used without a water rinse, which works well for a blanket Si wafer since the etch is hydrophobic and rolls off the surface. However, for a patterned wafer the etch droplets are difficult to remove and tend to hide in corners and edges of the oxide pattern to which they adhere because the oxide surface is hydrophilic; then, when the etch droplets are removed by being blown off, they scatter and ultimately evaporate leaving undesired etch by-products and particles on the Si surface. Nevertheless, as noted above, Si epitaxy grown by UHV/CVD uses deposition from silane gas. This deposition tends to overgrow some surface oxide and foreign material without causing a defect in the bulk of the film. But, although this overgrowth capability can greatly reduce, it does not totally eliminate, defects in the grown film due to foreign material at the surface. It will be understood that a film essentially free of defects is clearly necessary for high device yield. However, while it is undesirable to have encapsulated foreign material at the interface, it is not yet clear whether it can be a yield detractor.
In contrast to the UHV/CVD produced low defect film, the APCVD process using DCS can lead to a high density of random defects in the epitaxial (epi) layer unless a high temperature prebake in H.sub.2, e.g., at about 950.degree. C. for about 5 minutes, is used just prior to deposition. Transmission electron microscope (TEM) data shows that foreign material and oxide at the interface leads to micro twin formation, a shallow surface pyramid and a relatively greater defect density than in the silane system. This is a disadvantage of the APCVD process with DCS.
A comprehensive epitaxial deposition system can dope high, controllable n- and p-type layers as well as produce SiGe alloys. Both UHV/CVD using silane and APCVD using DCS can grow such p-type layers as well as SiGe alloys. However, while n-type doping at very high levels is accessible in APCVD using DCS (See T. O. SEDGWICK, P. D. AGNELLO, D. NGUYEN NGOC, T. S. KUAN, and G. SCILLA, Appl. Phys. Lett., 58 (17) 1986 (1991)), high and controllable n-type doping in Si is not possible in silane-based systems at any temperature or pressure.
Another very important difference between the two low temperature epitaxial systems is that the APCVD process using DCS (with or without added HCl) grows Si selectively, a one-sided advantage. The UHV/CVD process using silane is not strongly selective. In the UHV/CVD silane system, while initially the Si deposits selectively, i.e., only on the bare Si leaving the oxide covered regions free of deposition, after the film has grown to a thickness of only 10 nm or so the deposition then takes place uniformly over both the oxide pattern as well as on the Si areas, that is, by blanket deposition. The substitution of disilane for silane increases the selectivity thickness somewhat (See H. HIRAYAMA, T. TATSUMI, and N. AIZAKI, Appl. Phys. Lett., 52(26) 2242 (1988)). Therefore, except for very thin layers, UHV/CVD is a blanket deposition process. The capability for both blanket and selective deposition is important and a powerful process would be able to grow either selective or blanket layers.
Another problem in semiconductor deposition is the difference in deposition rate that occurs between the rate for the deposition of single crystal Si on a single crystal substrate or seed layer and the rate of polycrystalline Si (poly-Si) deposition on an insulator layer such as silicon dioxide. In UHV/CVD, for example, the deposition rate of polycrystalline layers on an oxide is about one half that of single crystal on a single crystal area. This renders control of deposition thickness on patterned surfaces difficult. It is therefore desirable to have a powerful deposition process that would be able to control the relative deposition rates to achieve specific relative polycrystalline and single crystal layer thickness providing process simplification in a total device fabrication.
A further problem is raised by the present discovery that in the APCVD system silane will not react to deposit Si at low temperatures, about 750.degree. C., in a pure H.sub.2 ambience at one atmosphere pressure, since H.sub.2 inhibits the decomposition of silane at low temperatures. Such deposition does take place in inert ambiences, but it appears that even though Si films may be grown in an ultra-clean system there is usually residual oxygen at the epitaxial interface, due to residual impurities of oxygen and water vapor in the high purity gas. This residual oxygen can react with the Si surface. In this regard it has been noted that intrinsic to the APCVD processing is the fact that H.sub.2 has been found to inhibit the oxidation of a Si surface in the temperature range of 650.degree.-850.degree. C. (See T. O. SEDGWICK and P. D. AGNELLO, Proceedings of the Eleventh International Conference on Chemical Vapor Deposition, CVD-XI, Eds. K. E. SPEAR and G. W. CULLEN, 90-12, The Electrochemical Society, Pennington, N.J., 1990, Part IV, No. 33, p. 247-253.) Thus, while hydrogen inhibits the formation of oxide on the Si surface, a desirable effect, still too much hydrogen can prevent the silane decomposition, an undesirable effect, leading to conflicting processing requirements.
Objects
It is accordingly an object of the present invention to provide a powerful process and system capable of growing either selective or blanket layers of epitaxial silicon in connection with APCVD processing to produce defect free films.
It is a further object of this invention to provide novel implementations of various process conditions to effect a comprehensive and broadly useful integrated low temperature epitaxial process.
It is another object of the invention to provide a powerful process and system capable of controlling the relative deposition rates for the deposition of single crystal Si on a single crystal substrate and of polycrystalline Si on an insulator layer so as to achieve specific relative polycrystalline and single crystal layer thickness on a single surface such as a patterned surface.
It is also an object of this invention to optimally combine the advantages of a high temperature hydrogen prebake with the advantage of blanket deposition of Si from silane.